Author ORCID Identifier

Reza Hashemian: https://orcid.org/0000-0002-0028-7078

Publication Title

IEEE Transactions on Circuits and Systems II: Express Briefs

ISSN

15497747

E-ISSN

15583791

Document Type

Article

Abstract

The objective here is to expand and complete the development of a recently published article “A Comprehensive and Unified Procedure for Symbolic Analysis of Linear Analog Circuits”. This expansion is in three areas. 1) Here, the element values are not limited to admittances. Both admittances and impedances are used. 2) The linear active devises are not limited to VCCSs, but the other controlled sources, VCVSs, CCVSs, and CCCSs are also valid components. 3) The I/O ports are expanded and now all four types of I/O ports, namely, current source inputs and voltage outputs, current source inputs and current outputs, voltage source inputs and voltage outputs, and voltage source inputs and current outputs are included in the process. The method consists of two main processes. In the first process a circuit with active devices and I/O ports is converted into a nullor circuit. The nullor circuit is then partitioned into two parts, a passive circuit and an all-nullor circuit. It is shown that the magnitude of the determinant comes from the passive part and the sign (0, 1, or -1) results from the all-nullor circuit.

Publication Date

1-1-2022

DOI

10.1109/TCSII.2022.3210235

Keywords

Active circuits, Admittance, Admittance method, analog circuits, Impedance, parallelseries operations, Passive circuits, sum of tree products, Transfer functions, transfer functions, Voltage, Voltage control

Fulltext File with Record

1

Department

Department of Electrical Engineering

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