Publication Date

1992

Document Type

Dissertation/Thesis

First Advisor

Genis, Alan P.

Degree Name

M.S. (Master of Science)

Department

Department of Electrical Engineering

LCSH

Metal oxide semiconductors, Complementary||Diffusion||Electric inverters

Abstract

The emphasis of the design is to achieve threshold voltages of -0.27 volts and 1.87 volts for a p-channel Metal Oxide Semiconductor and a n-channel Metal Oxide Semiconductor respectively. The following paper describes a complete process in designing and fabricating a five micron Complementary Metal Oxide Semiconductor (CMOS) Inverter device within a Class 1000 wafer fabrication area, utilizing Mead and Conway's lambda-base rules and diffusion techniques. A Complementary Metal Oxide Semiconductor Inverter utilizes two separate transistors, a p-channel Metal Oxide Semiconductor and a n-channel Metal Oxide Semiconductor. The silicon substrate is an n-type, in which a p-well region is created by diffusion. The p-channel transistor is formed in the n-type silicon substrate, whereas the n-channel transistor is created in the p-well region, which performs as the backgate for the n-channel transistor. The experimental measurements on the p-channel MOSFET and n-channel MOSFET structures corresponding to the computations derived from the theoretical equations showed a disagreement. Threshold voltages of +2.5 and +2.0 volts for p- and n- MOSFET's were obtained, respectively.

Comments

Includes bibliographical references (leaf 61)

Extent

vi, 92 pages

Language

eng

Publisher

Northern Illinois University

Rights Statement

In Copyright

Rights Statement 2

NIU theses are protected by copyright. They may be viewed from Huskie Commons for any purpose, but reproduction or distribution in any format is prohibited without the written permission of the authors.

Media Type

Text

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