M.S. (Master of Science)
Department of Electrical Engineering
Signal processing--Digital techniques||Echo suppression (Telecommunication)||Floating-point arithmetic
DSP technology has evolved at a tremendous pace in the recent past. Increased clock speeds and processing power due to architectural enhancements have made the implementation of computationally intensive algorithms in real time a reality. Echo cancellation is one such application that has immensely benefited from this phenomenon. The main motivation for this thesis was to develop a floating-point DSP system suitable for acoustic echo cancellation (AEC) in teleconferencing applications. Floatingpoint DSP was chosen as it offers a wider dynamic range for the input signal than its fixed-point counterparts. Conventionally, two input/output (I/O) ports are required in the DSP chip to facilitate echo cancellation. In this project, an AEC system was designed and implemented using a DSP chip with one I/O port only. This was made possible by using the A/D-D/A converters in a ?master-slave? topology. A memory expansion board was designed to accommodate the large memory needs. Issues involved in real-time implementation of echo cancellers are also discussed. In addition to discussing some of the theoretical aspects of echo cancellation algorithms, this thesis also compares the effect of fixed-point and floating-point implementations of adaptive algorithms. The effects of finite precision, quantization and dynamic range on the performance of digital filters are also discussed.
Janakiraman, Hareesh, "Design and development of a floating-point DSP system with single input/output channel for DSP applications" (1999). Graduate Research Theses & Dissertations. 2080.
xi, 96 pages
Northern Illinois University
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